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The Platform Viability theme

viability posters submitted in the last year:

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Abstraction-Based NoC Performance Analysis
PROMOTE: PROcess MOnitoring and TEsting of Analog/RF circuits
End-to-End Error Correction and Online Diagnosis for On-Chip Networks
VaST: Validation Signature Test
Digitally Assisted VaST Driven Post-manufacture Adaptation of Analog / RF Systems
Phase-Locked Loop Verification by a Bounded Model Checking Approach
Concurrent Autonomous Self-Test and Diagnostics
Formalizing and Demistifyng the PowerPC Memory Model
Variation Tolerant Optical NoC
Post-silicon Validation of Weak Memory Consistency
Hierarchical Mixed-Signal/RF System Level Test &Validation
Content Aware Channel Adaptive Low Power MIMO System for Video Transmission
U-QED Tests for Effective Post-Silicon Validation of SoCs
Error Modeling of Electrical Bugs for Post-Silicon Validation