The Platform Viability theme

BER-Driven Real Time Adaptation of MIMO RF Receiver Systems for Energy Efficient Wireless Communication
Power Aware Post-Manufacture Tuning of MIMO Receiver Systems
Post-Fabrication Reconfiguration for Power-Optimized Tuning of Optically Connected Multi-Core Systems
On Error Modeling of Electrical Bugs for Post-Silicon Timing Validation
Simulation-based Signal Selection for State Restoration in Silicon Debug
SAT-based Techniques for Determining Backbones for Post-Silicon Fault Localisation
Post-Silicon Fault Localisation Using Maximum Satisfiability and Backbones
Optimal Linearity Testing of Sigma-Delta Based Incremental ADCs Using Restricted Code Measurements
Image-Quality-Aware Metrics for Performance Specification of ADC Array in 3D CMOS Imagers
Image-Quality-Driven Metrics for Testing and Calibrating ADC Array in CMOS Imagers: A First Step
Mixed Signal System-Level Cross-Layer Adaptation for Variability and Workload: A Pilot Study
High Performance Gate-level Simulation with GP-GPU Computing
Abstraction-Based Performance Analysis of NoCs
Orthogonally Tunable Inductorless RF LNA for Adaptive Wireless Systems
Accurate Signature Driven Power Conscious Tuning of RF Systems Using Hierarchical Performance Models
Signature Testing and Diagnosis of High Precision Σ∆ ADC Dynamic Specifications Using Model Parameter Estimation
Power Aware Post-Manufacture Tuning of Analog Nanocircuits

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