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	Authors:	Yury Markovskiy, John Wawrzynek, Ken Lutz, Daniel Burke, Andrew Schultz, Stanley Yuan-Shih Chen, Kaushik Ravindran, Chris R. Baker, Jan Rabaey, Jana van Greunen
	Presenters:	Chris R. Baker, Yury Markovskiy

Mar 14, 2006,   GSRC Workshop, March 2006

   Hybrid Processor Accellerator Coexecution Environment - Where Does the Compiler Come In?

	Authors:	Sain-Zee Ueng, Wen-mei Hwu, Steven Lumetta, Daniel Burke
	Presenter:	Sain-Zee Ueng

Mar 14, 2006,   GSRC Workshop, March 2006

   REVEAL - A Scalable Verification Tool for High-Level Verilog Models

	Authors:	Zaher Andraus, Karem Sakallah
	Presenter:	Zaher Andraus

Mar 14, 2006,   GSRC Workshop, March 2006

   Streaming Media over an Application Specific Multiprocessor

	Authors:	William Plishker, Kurt Keutzer
	Presenter:	William Plishker

Mar 14, 2006,   GSRC Workshop, March 2006

   VCEGAR: Verilog CounterExample Guided Abstraction and Refinement

	Authors:	Himanshu Jain, Daniel Kroening, Edmund Clarke
	Presenter:	Himanshu Jain

Mar 14, 2006,   GSRC Workshop, March 2006