Video Introduction
by leader Wen-mei Hwu

Recently, design has entered the power-limited scaling regime. As a result, it is now commonly accepted that future advances in computational performance will mostly result from increases in concurrency and efficiency rather than an increase in raw speed. With the possibility of integrating billions of transistors on a chip, the idea of having hundreds to thousands of concurrently operating processing elements on a die is not too far-fetched. Yet, multiple challenges and questions remain before this approach becomes even remotely viable. Current approaches towards architecture selection and instantiation are either ad-hoc, or overly generic. Comparison over a set of meaningful metrics (such as power efficiency, coverage, performance, predictability) is hard. More importantly, no generic software development environments are available. While all of these problems are well-known and have been researched over a long time without making much inroads, the fact that massively concurrent systems-on-a-chip are on the horizon adds a sense of urgency and at the same time creates a unique opportunity. Long-standing practices from the integrated circuit design community such as abstraction, models of computation, separation of concerns and constraining of the design space may prove to be successful in this arena as well. The fact that the typical embedded-systems application (be it in the areas of communication, multimedia, graphics, automotive, etc.) offers plenty of opportunity for parallelization comes as an extra bonus.

To be more precise, we have identified the followings research needs to be addressed in this theme:

Novel µ-architectures that inherently support concurrency.
Application-aware run-time reconfiguration of hardware and operating systems for performance, energy or reliability.
Exploration platforms that allow for the analysis and metrics-based comparison of massively concurrent architectures.
Prototyping environments for virtual concurrent architectures - enabling the development of software tool flow before or together with the hardware platform.
Software environments (middleware, operating systems and compilers) for concurrent (homogeneous and heterogeneous) architectures.
Distributed systems where the functionality is delivered by an ensemble of spatially distributed compute and communication systems.

The immediacy of the power challenge makes concurrent system design a problem that should be adequately solved and addressed in the near future (approximately five years out).

Design Technologies for Concurrent Systems