GSRC Student Profile:
Research Overview: Verification-guided Error Resilience
Our research focuses on combining formal and simulation techniques to estimate circuit vulnerabilities and provide error resilience. Current and past research includes providing a complete methodology to soft error vulnerabilities estimation by an efficient and accurate circuit simulation and a system-level analysis; developing a theory of mutations for analyzing coverage for fault tolerant circuits; developing techniques of scalable specification mining that can be applied to verification of digital circuits and post-Si fault localization; and developing techniques for synthesizing optimal control for circuit resilience mechanisms.
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