GSRC Student Profile:
Research Overview: Reliable processor design
In-field failures are a serious threat to processor designers. With ever increasing sources of such failures, like soft-errors, wear-out, variation, etc., traditional techniques that ensured high-reliability are failing to achieve the required reliability targets. Hence, researchers have begun to look for architecture level solutions to deal with this reliability problem.
My research focuses on architecture-level solutions to deal with such impending reliability concerns. Such architecture-level solutions present interesting trade-offs between performance, over-head and realiblity which I explore as part of my research.
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