GSRC Student Profile:
Research Overview: Accelerator-based computing
My research focuses on integrating hardware accelerators into CPU architectures. These accelerators are well known for improving performance and energy consumption by orders of magnitude. Such attributes are well suited to address growing concerns over hard power budgets, while providing an additional avenue for performance gains. Such results would be welcome in many computing domains, ranging from ultra-low power sensor network notes to the server room.
Of course, hardware accelerators have a downside, namely that they are limited to a particular workload set and are not flexible to varying tasks. Relying on a single accelerator may help with a single application, but could hardly replace general purpose processors. With this in mind, I am working toward architectures that integrate many accelerators into a single processor, so that a single CPU can reap the rewards of acceleration on a wide set of workloads.
I am currently using this approach to develop an accelerator-based CPU brain for the RoboBees robotic bee project. It is our goal to create an autonomous bee-sized flying robot that can communicate with other RoboBees. To achieve this vision, the RoboBee's brain must be capable of hefty computation while using minimal power. We believe an architecture based around hardware acceleration is the key to making these goals a reality.
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