GSRC Student Profile:
Research Overview: Effective Post-SIlicon Validation
Post-silicon design validation is getting difficult, expensive and complex for future systems. It is already difficult for single cores. However, SoCs with many complex uncore components (such as shared cache / memory / network controllers, power control mechanisms, and accelerators such as those for graphics and cryptography) significantly exacerbate the challenge. My research focuses on using combination of software and hardware techniques to over come challenges in post silicon. Specifically, I focus on systematic and efficient methods for bug detection and localization.
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