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GSRC Student Profile:

Hyungmin Cho

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Stanford University
Advisor: Subhasish Mitra

GSRC theme:  alternatives
Expected graduation:  Jun, 2014

Research Overview:  Error Resilient System Architecture

There is a growing concern about the increasing vulnerability of future computing systems to errors in the underlying hardware. Traditional redundancy techniques are expensive for designing energy-efficient systems that are resilient to high error rates.

Error Resilient System Architecture is targeting low-cost, robust system that provides efficient computing platform for broad range of applications. The key ideas are making a system with asymmetric, configurable reliability. The system's reliability level will be tailored to the specific application's error resiliency level to maximize cost effectiveness. To enable such system, multiple layers of the system, including hardware design, system software and the application itself, will cooperate.