| | GSRC Student Profile:
Research Overview: Performance and Energy Optimizations for On-Chip Interconnection Networks
My research is focused on computer architecture, and more specifically, interconnection networks. I am interested in overcoming the communication wall by designing close-to-ideal on-chip communication networks for future multi- and many-core architectures, both from a performance and power standpoint. I am also interested in power- and thermal-aware system design.
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