sig_verification

The Verification Special Interest Group (SIG) brings together GSRC researchers involved in various aspects of design verification. This includes the faculty and students involved in the center, as well as researchers at our sponsor companies. Within GSRC the verification efforts are spread across the concurrency and resiliency themes.

In the concurrency theme the faculty (Ed Clarke, CMU and Karem Sakallah, Michigan) are addressing the scaling challenges posed by the complex interactions between the increasing number of software and hardware components in gigascale systems.

In the resiliency theme, the faculty (Valeria Bertacco, Michigan; Sanjit Seshia, Berkeley and Sharad Malik, Princeton) are examining the use of runtime techniques for detecting and/or recovering from functional failures. In addition, this group is also studying the applicability of these techniques for post-silicon debug.

We welcome interactions with groups in our sponsor companies involved in all aspects of design verification - both pre-silicon verification using simulation, formal verification and emulation, as well as post-silicon debug.

This group has the following subpages:

• Overview
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