Search: 
 
Commands
  Search database
  Annual Summary 07-08:
        Full Summary

Quick search by ...
Theme
  alternative
concurrent
core
resilient
heterogeneous
infrastructure
microarch
power
reliable
roadmap
self_test
soft
verification

Design Driver
  driver
ambient
gateway
Year
  2008
2007
2006
2005
2004
2003
2002
2001
2000
1999
1998

Group
  2006faculty
bee2
bk_partitioning
bk_placement
bk_routing
bookshelf
embedded
fabricsthrust
faculty
fresco
gsrc
gsrcadmin
gsrc_faculty
gtx
infrax
marcov
mescal
metropolis
nexsis
polis
ptolemy
semantics
sig_modeling
sig_power
sig_uarch
sig_verification
testthrust
theme_leaders
 Computation as Estimation: Estimation-theoretic IC Design Improves Robustness and Reduces Power Consumption
Sriram Narayanan, Girish V. Varatkar, Douglas L. Jones, Naresh Shanbhag

Citation
Sriram Narayanan, Girish V. Varatkar, Douglas L. Jones, Naresh Shanbhag. "Computation as Estimation: Estimation-theoretic IC Design Improves Robustness and Reduces Power Consumption". Proceedings of ICASSP, IEEE, April, 2008.

Abstract
Modern Integrated Circuits (ICs) are designed as massively parallel systems as a consequence of diminishing silicon feature sizes. This has adversely impacted reliability because of increased errors due to process and environmental variations, and particle hits. Viewing hardware errors as analogous to measurement or system noise allows us to borrow results from estimation theory and extend Moore's law. The estimation-theoretic framework provides a design optimization formalization that enables power/reliability trade-off in broad classes of applications. Two applications described here show that specific instantiations of the framework yield significant power savings and system reliability.

Electronic downloads

Citation formats  

  • HTML
    Sriram Narayanan, Girish V. Varatkar, Douglas L. Jones,
    Naresh Shanbhag. <a
    href="http://www.gigascale.org/pubs/1168.html">Computation
    as Estimation: Estimation-theoretic IC Design Improves
    Robustness and Reduces Power Consumption</a>,
    Proceedings of ICASSP, IEEE, April, 2008.
  • Plain text
    Sriram Narayanan, Girish V. Varatkar, Douglas L. Jones,
    Naresh Shanbhag. "Computation as Estimation:
    Estimation-theoretic IC Design Improves Robustness and
    Reduces Power Consumption". Proceedings of ICASSP, IEEE,
    April, 2008.
  • BibTeX
    @inproceedings{NarayananVaratkarJonesShanbhag2008,
        author = {Sriram Narayanan and Girish V. Varatkar and
                  Douglas L. Jones and Naresh Shanbhag},
        title = {Computation as Estimation: Estimation-theoretic IC
                  Design Improves Robustness and Reduces Power
                  Consumption},
        booktitle = {Proceedings of ICASSP},
        organization = {IEEE},
        month = {April},
        year = {2008},
        URL = {http://www.gigascale.org/pubs/1168.html}
    }
    

Posted by Sriram Narayanan on 11 Jan 2008..

Notice: This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright.

 
You are not logged in
©1998-2008 GSRC