Citation
Umit Y. Ogras, Radu Marculescu, Puru Choudhary, Diana Marculescu. "Voltage-Frequency Island Partitioning for GALS-based Networks-on-Chip". Proc. IEEE/ACM Design Automation Conf., San Diego, June, 2007.

Abstract
Due to high levels of integration and complexity, the design of multi-core SoCs has become increasingly challenging. In particular,energy consumption and distributing a single global clock signal throughout a chip have become major design bottlenecks. To deal with these issues, a globally asynchronous, locally synchronous (GALS) design is considered for achieving low power consumption and modular design. Such a design style fits nicely with the concept of voltage-frequency islands (VFIs) which has been recently introduced for achieving fine-grain system-level power management. This paper proposes a design methodology for partitioning an NoC architecture into multiple VFIs and assigning supply and threshold voltage levels to each VFI. Simulation results show about 40% savings for a real video application and demonstrate the effectiveness of our approach in reducing the overall system energy consumption. The results and functional correctness are validated using an FPGA prototype for an NoC with multiple VFIs.

Electronic downloads

• http://www.ece.cmu.edu/~sld/pubs/papers/8-1-ogras.pdf

Citation formats

• HTML

  Umit Y. Ogras, Radu Marculescu, Puru Choudhary, Diana
  Marculescu. <a
  href="http://www.gigascale.org/pubs/1024.html">Voltage-Frequency
  Island Partitioning for GALS-based
  Networks-on-Chip</a>, Proc. IEEE/ACM Design Automation
  Conf., San Diego, June, 2007.

• Plain text

  Umit Y. Ogras, Radu Marculescu, Puru Choudhary, Diana
  Marculescu. "Voltage-Frequency Island Partitioning for
  GALS-based Networks-on-Chip". Proc. IEEE/ACM Design
  Automation Conf., San Diego, June, 2007.

• BibTeX

  @inproceedings{OgrasMarculescuChoudharyMarculescu07_VoltageFrequencyIslandPartitioningForGALSbasedNetworksonChip,
      author = {Umit Y. Ogras and Radu Marculescu and Puru
                Choudhary and Diana Marculescu},
      title = {Voltage-Frequency Island Partitioning for
                GALS-based Networks-on-Chip},
      booktitle = {Proc. IEEE/ACM Design Automation Conf., San Diego},
      month = {June},
      year = {2007},
      abstract = {Due to high levels of integration and complexity,
                the design of multi-core SoCs has become
                increasingly challenging. In particular,energy
                consumption and distributing a single global clock
                signal throughout a chip have become major design
                bottlenecks. To deal with these issues, a globally
                asynchronous, locally synchronous (GALS) design is
                considered for achieving low power consumption and
                modular design. Such a design style fits nicely
                with the concept of voltage-frequency islands
                (VFIs) which has been recently introduced for
                achieving fine-grain system-level power
                management. This paper proposes a design
                methodology for partitioning an NoC architecture
                into multiple VFIs and assigning supply and
                threshold voltage levels to each VFI. Simulation
                results show about 40% savings for a real video
                application and demonstrate the effectiveness of
                our approach in reducing the overall system energy
                consumption. The results and functional
                correctness are validated using an FPGA prototype
                for an NoC with multiple VFIs.},
      URL = {http://www.gigascale.org/pubs/1024.html}
  }
  

Posted by Umit Y. Ogras on 19 Jun 2007..

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