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GSRC e-Seminar on Designing High-Performance and Fair Shared Multi-core Memory Systems
Mar 23, 2010
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Mar 23, 2010 -- GSRC e-Seminar on Designing High-Performance and Fair Shared Multi-core Memory Systems
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Designing High-Performance and Fair Shared Multi-core Memory Systems: Two Approaches
Pub ID: 2197
Author:
Onur Mutlu
Cores/threads in a multi/many-core system share multiple hardware resources in the memory subsystem. If threads are not prioritized intelligently in shared memory subsystem resources, system performance can degrade significantly, and some important threads can be slowed down unfairly or starved for long time periods. In fact, effective programs can be written to deny service to other concurrent programs by exploiting the unfair prioritization mechanisms in shared multi-core resources. Our recent research has focused on solving these problems by designing control mechanisms for shared resources (memory controllers, on-chip networks, and caches) that improve both system performance and system fairness. This talk explores two of our recent approaches to the shared multi-core resource management problem. Our first approach provides a scalable and configurable memory access scheduling algorithm that aims to maximize system performance when multiple memory controllers are shared between threads. The idea is to minimize the amount of time the system spends waiting for memory by periodically prioritizing threads that have attained the least service from the controllers over a time interval. Our second approach is fundamentally different: rather than building an intelligent control mechanism in each shared hardware resource, we devise a configurable technique that throttles cores' requests into the memory system intelligently to improve both performance and fairness. The idea is to estimate slowdown of threads in the shared memory system resources and accordingly throttle cores to achieve a performance/fairness target. Our evaluations show that both approaches significantly improve system throughput in a multi-core processor, while being configurable by the system software. The system software can program both approaches to enforce thread priorities in shared resources in order to achieve different QoS objectives. Our talk will end with a discussion of the implications of these approaches on future work in shared resource management.
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