GSRC: Center Overview
Learning Methods in Adaptive Signal Processing
Tera-scale Computing Research Addressing the challenges of mainstream parallel computing
Single access point location services for contextual prompting in healthcare [ edit ]
FCUDA-II:Customize CUDA and FPGA Utilization for Enhanced Reconfigurable Computing
Low-power MCU (DSP) for Medical Applications
RAMCloud RPC System
Cost of Error Resiliency: The Alternative Theme Perspective
Multi-stage Polymorphic Embedding: A New Approach for Building Domain-Specific Languages
Low-Cost Resilience via Introspective Software-Based Testing
Dynamically Accelerating Client-sideWeb Applications
Cost-Effective Resilient Systems
Reducing The Cost of Performance for Many-Core Applications
Low-Cost Resiliency: An Industry Perspective
Application Frameworksfor Multi/Manycore Architectures
Infrastructure for Customizable Heterogeneous Architecture Exploration
Electrical Validation Challenges What will the future be like?
Experiences with the CrashTest Platform for Resiliency Analysis
Be Assertiive to Be Resilient
Experiences Using Academic Experimental Infrastructure At Intel
Challenges and Opportunities in Designing Robust Ultra-Low Power Integrated Microsystems [ edit ]
Optimization of Platform Interconnects Using 3D Technology [ edit ]
Grace: Safe Multithreaded Programming for C/C++
Architecture Implications of 3DVLSI on High-End Systems
Architecture-aware Analysis of Concurrent Software
System-Level Impact of 3D
Analog Circuit Verification by Statistical Model Checking
3D CMP Exploration
Parallelizing Graph Algorithms in Speech Recognition and CAD
Application Drivers Theme May
Addressing Dynamic, Irregular Computation and Non-uniform Data Distribution in Real-world Many-core Applications
Ultra-low-power Platforms for Biomedical Sensing and Patient Monitoring Networks
SCC and the Fundamental Research Questions in Scalable Algorithms
Post-Si Validation Challenges and Opportunities: A CAD Perspective
Post-Silicon Validation of Robust Systems IFRA + QED
Coverage Metrics for Post-Silicon Validation
Post-Silicon Validation of CMP Cache Protocols
Opportunities for Stochastic Processing in Biomedical Detection and Sensing
Stochastic Computing Opportunities in Biomedical
FCRP - Connectivity Cross-Cut Workshop
What's Wrong With My Multicore? -- Post-silicon validation of the memory subsystem
RAMCloud: Scalable High-Performance Storage Entirely in DRAM
Runtime Checking of Serializability in Software Transactional Memory
Designing High-Performance and Fair Shared Multi-core Memory Systems: Two Approaches
The PARSEC Benchmark Suite
Validation Challenges in Firmware and Low Level Software
Architectures for Accelerator-Centric Computing
Visual Recognition in the Three-Dimensional World
Algorithm Driven Platform Electronics for Embedded Healthcare