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Valeria Bertacco
    University of Michigan

Username:valeria
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Home page:http://www.eecs.umich.edu/~valeria
Bio:Valeria Bertacco is an Assistant Professor of Electrical Engineering and Computer Science (EECS) at the University of Michigan. Her research interests are in the areas of computer-aided design with emphasis on formal verification, logic simulation, system analysis and core CAD algorithms. Dr. Bertacco recently joined the faculty after being at Synopsys for 4 years as a Staff Research Engineer in the Verification Group and in the Advanced Technology Group, where she was part of the core team that created Magellan, the solution proposed by Synopsys for the formal verification of digital designs. Prior to Synopsys, she was with Systems Science Inc., a Palo Alto startup which developed Vera, a testbench development language for verification, later acquired by Synopsys.

During her transition from Synopsys to the University of Michigan, she received her Ph.D. degree in Electrical Engineering from Stanford University in 2003. She also holds an M.S. in Electrical Engineering from Stanford and a Laurea degree summa cum laude in Computer Engineering from the University of Padua in Italy.

Currently, her research group is exploring hybrid verification techniques to improve the scalability of verification without sacrificing quality, and to reduce the engineering effort involved in verification. In addition, she is working on core aspects of CAD and Boolean functions by focusing on algorithms and theory of disjoint support decompositions.

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