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Valeria Bertacco
    University of Michigan

Username:valeria
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Home page:http://www.eecs.umich.edu/~valeria
Bio:Valeria Bertacco is an Assistant Professor of Electrical Engineering and Computer Science at the University of Michigan. Her research focuses on design correctness in face of design errors, transistor failures and transient errors. Her work spans from design verification, post-silicon and runtime validation and fault-tolerance. Her research group is currently exploring novel post-silicon and runtime solutions that enable hardware patching of silicon components at extremely low cost and performance overhead. Most recently, Valeria and her team have started to apply runtime solutions to the domain of software and hardware security.

Valeria joined the faculty at Michigan after being in the Advanced Technology Group of Synopsys for four years as a lead developer of Vera and Magellan, two popular verification tools. Valeria serves in several conference program committees, including DATE, DAC and ICCAD, and she is an Associated Editor for the IEEE Transactions on CAD. In 2005, she authored a book on symbolic simulation. In addition, she has been leading the effort for the development of the verification section in the International Technology Roadmap for Semiconductors report since 2004. She received her M.S. and a Ph.D. degree in Electrical Engineering from Stanford University in 1998 and 2003, respectively. Valeria is a recipient of the NSF CAREER award and of the University of Michigan EECS Department Outstanding Achievement award.

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