| Bio: | Subhasish Mitra is an Assistant Professor in the Departments of Electrical Engineering and Computer Science of Stanford University where he leads the Stanford Robust Systems Group. His research interests include robust system design, VLSI design, CAD and test, and design for emerging nanotechnologies. Prior to joining Stanford, Prof. Mitra was a Principal Engineer at Intel Corporation. He received Ph.D. in Electrical Engineering from Stanford University.
Prof. Mitra has co-authored 100+ technical papers, and has invented design and test techniques that have seen wide-spread proliferation in the chip design industry. His X-Compact technique for test compression is used by 50+ Intel products, and is supported by major CAD tools. His work on imperfection-immune circuits using carbon nanotubes, jointly with his students and collaborators, has been highlighted by the MIT Technology Review, EE Times, Semiconductor Research Corporation, and several others. Prof. Mitra's major honors include the National Science Foundation CAREER Award, Terman Fellowship, IEEE Circuits and Systems Society Donald O. Pederson Award for the best paper published in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, ACM SIGDA Outstanding New Faculty Award, Best Paper Award at the IEEE/ACM Design Automation Conference, a Divisional Recognition Award from Intel "for a Breakthrough Soft Error Protection Technology," a Best Paper Award at the Intel Design and Test Technology Conference for his work on Built-In Soft Error Resilience, and the Intel Achievement Award, Intel's highest corporate honor, "for the development and deployment of a breakthrough test compression technology."
Prof. Mitra has held several consulting positions, and served on committees of several IEEE and ACM conferences and workshops as co-founder, general and program chair, and organizing and program committee member. |
