vinay krishnan on majc architecture
Kurt Keutzer, 26 Sep 2001

This may be somewhat anti-climactic at this point but I'm putting this up for vinay who is locked out due to the nimba virus. I guess he sent it as mail as well. The reconfigurable processor architecture, or rather, the 'class' of processors that the project aims to come up with reminded me of the MAJC architecture from Sun. Although there are many processors with VLIW architectures, the particular format which is mentioned, wherein you have a network of interconnected PE's each of whom is a VLIW processor, maps very closely with the MAJC's concept of interconnected Processing Units (PU). Of course, they are a set of homogenous PU/E's, meant for general purpose computing. The MESCAL 'family' of processors would be customized for the application, and so would be more powerful as far as the application is concerned. However, the MAJC architecture comes with a lot of tricks(for want of a better word) for boosting processing speed like Space Time Computing, and Vertical Multithreading, using its interconnected PU concept, which would seem to be adaptable to the MESCAL processor family as a general performance improvement feature. I do not know of the feasibility of these, or whether these are already part of the design, or whether copyright issues with Sun would come in, or even whether I am barking up the wrong tree (or wrong Agave plant, in this case). I hope that this would be useful to you in some way. Some details about the MAJC architecture can be found at.- http://www.sun.com/microelectronics/MAJC/documentation/majcintro.html http://www.sun.com/microelectronics/MAJC/documentation/docs/majctutorial.pdf -with warm regards, Vinay Krishnan