Circuit-Switched Coherence, Natalie Enright Jerger, Li-Shiuan Peh, Mikko Lipasti

GPU Acceleration of Cutoff Pair Potentials for Molecular Modeling Applications, Christopher Rodrigues, David Hardy, John Stone, Klaus Schulten, Wen-mei Hwu

Circuit Failure Prediction for Robust System Design in Scaled CMOS, Subhasish Mitra

A Study on Monetary Cost Analysis for Product Line Architectures, Arkadeb Ghosal, Alberto Sangiovanni-Vincentelli, Sri Kanajan

Logical Reliability of Interacting Real-Time Tasks, Arkadeb Ghosal, Tom Henzinger, Claudio Pinello, Alberto Sangiovanni-Vincentelli, Krishnendu Chatterjee, Daniel Iercan, Christoph Kirsch

CUBA: An Architecture for Efficient CPU/Co-processor Data Communication, Isaac Gelado, John H. Kelm, Shane Ryoo, Steven Lumetta, Jose (Nacho) Navarro, Wen-mei Hwu

On the Duality between Vacuity and Coverage, Sanjit A. Seshia, Wenchao Li, Orna Kupferman

System-Level Synthesis - Functions, Architectures, and Communications, Douglas Densmore, Jason Cong, Radu Marculescu, Alberto Sangiovanni-Vincentelli, Clas Jacobson

Enabling multimedia using resource-constrained video processing techniques: A node-centric perspective, Nicholas H. Zamora, Xiaoping Hu , Umit Y. Ogras, Radu Marculescu

Node criticality computation for circuit timing analysis and optimization under NBTI effect, Wenping Wang, Kevin Cao

MCUDA: An Efficient Implementation of CUDA Kernels on Multi-cores, John Stratton, Sam Stone, Wen-mei Hwu

Accelerating Advanced MRI Reconstructions on GPUs, Sam Stone, Justin Haldar, Stephanie C. Tsao, Wen-mei Hwu, Zhi-Pei Liang, Bradley P. Sutton

SymPLFIED: Symbolic Program-Level Fault-Injection and Error-Detection Framework, Karthik Pattabiraman, Nithin Nakka, Zbigniew Kalbarczyk, Ravishankar Iyer

How GPUs Can Improve the Quality of Magnetic Resonance Imaging, Sam Stone, Haoran Yi, Justin Haldar, Wen-mei Hwu, Bradley Sutton, Zhi-Pei Liang

Metrics for Architecture-Level Lifetime Reliability Analysis, Pradeep Ramachandran, Sarita Adve, Pradip Bose, Jude A. Rivers

Metro II Execution Semantics for Mapping, Douglas Densmore, Trevor Meyerowitz, Abhijit Davare, Qi Zhu, Guang Yang

A Helper Thread Based EDP Reduction Scheme for Adapting Application Execution in CMPs, Yang Ding, Mahmut Kandemir, Padma Raghavan, Mary Jane Irwin

How GPUs Can Improve the Quality of Magnetic Resonance Imaging, Sam Stone, Haoran Yi, Justin Haldar, Wen-mei Hwu, Bradley Sutton, Zhi-Pei Liang

A 4.6Tbits/s 3.6GHz Single-cycle NoC Router with a Novel Switch Allocator in 65nm CMOS, Amit Kumar, Partha Kundu, Arvind Singh, Li-Shiuan Peh, Niraj Jha

Uncovering Hidden Loop Level Parallelism in Sequential Applications, Hongtao Zhong, Mojtaba Mehrara, Steve Lieberman, Scott Mahlke

Characterization of NBTI induced Temporal Performance Degradation in Nano-Scale SRAM array using IDDQ, Kunhyuk Kang, Ashraful Alam, Kaushik Roy

The Effect of Process Variation on Device Temperature in FinFET Circuits, jung-hwan choi, jayathi murthy, Kaushik Roy

Source-Level Timing Annotation and Simulation for a Heterogeneous Multiprocessor, Trevor Meyerowitz, Mirko Sauermann, Dominik Langen, Alberto Sangiovanni-Vincentelli

StageNet: A Reconfigurable CMP Fabric for Resilient Systems, Shantanu Gupta, Shuguang Feng, Jason Blome, Scott Mahlke

Program Optimization Strategies for Data-Parallel Many-Core Processors, Shane Ryoo

An efficient method to identify critical gates under circuit aging, Wenping Wang, Zile Wei, Shengqi Yang, Kevin Cao

How GPUs Can Improve the Quality of Magnetic Resonance Imaging, Sam Stone, Haoran Yi, Wen-mei Hwu, Justin Haldar, Bradley Sutton, Zhi-Pei Liang

Energy-Efficient Anonymous Multicast in Mobile Ad-Hoc Networks, Jung-Chun Kao, Radu Marculescu

Computation as Estimation: Estimation-theoretic IC Design Improves Robustness and Reduces Power Consumption, Sriram Narayanan, Girish V. Varatkar, Douglas L. Jones, Naresh Shanbhag

Sensor Networks-Inspired Low-Power Robust PN Code Acquisition, Sriram Narayanan, Girish V. Varatkar, Douglas L. Jones, Naresh Shanbhag

Variation-Tolerant Motion Estimation Architecture, Girish V. Varatkar, Naresh Shanbhag

Variation-Tolerant, Low-power PN-Code Acquisition using Stochastic Sensor NOC, Girish V. Varatkar, Sriram Narayanan, Naresh Shanbhag, Douglas L. Jones

Sensor Network-On-Chip, Girish V. Varatkar, Sriram Narayanan, Naresh Shanbhag, Douglas L. Jones

Error-Resilient Motion Estimation Architecture, Girish V. Varatkar, Naresh Shanbhag

NoC Prototyping Using FPGAs: Challenges and Promising Results in NoC Prototyping Using FPGAs, Umit Y. Ogras, Radu Marculescu, Hyung Gyu Lee, Choudhary Puru, Diana Marculescu, Michael Kaufman, Nelson Peter